Multitech IPC-551 Podręcznik Użytkownika Strona 15
- Strona / 84
- Spis treści
- ROZWIĄZYWANIE PROBLEMÓW
- BOOKMARKI
- User Guide 1
- 82098951 Revision B 2
- Contents 3
- Chapter 1 5
- Introduction 5
- 1-2. System Specifications 6
- 1-3. Safety Precautions 10
- Chapter 2 11
- 2-2 Component Locations 12
- 2-3 How to Set Jumpers 12
- Jumper Settings 13
- Hardware Configuration 15
- *** Factory default RS-232 17
- Figure 2-8: RS-422 at COM2 17
- Figure 2-9: RS-485 at COM2 17
- 2-8 COM1 Connector 20
- 2-9 COM2 Connector 20
- 2-10 Keyboard Connector 21
- 2-12 Reset Connector 22
- 2-17 VGA CRT Connector 25
- 2-18 Power Connector 26
- 2-19 Printer Connector 26
- 2-22. Memory Installation 28
- DRAM BANK CONFIGURATION 29
- Chapter 3 31
- Software Configuration 31
- << 32
- 3-2. Flash BIOS Update 36
- Chapter 4 39
- Green PC Function 39
- 4-2. CPU Doze Mode 40
- 4-3. System Standby Mode 40
- 4-4 System Suspend Mode 40
- Chapter 5 41
- Award BIOS Setup 41
- 5-2 Entering Setup 42
- CMOS SETUP UTILITY 43
- AWARD SOFTWARE, INC 43
- ROM PCI / ISA BIOS (2A59FP6C) 45
- STANDARD CMOS SETUP 45
- Halt On: 48
- Hard Disk Attributes: 49
- Virus Warning 50
- Quick Power On Self Test 51
- Boot Sequence 52
- Boot Up Floppy Seek 52
- Boot Up NumLock Status 52
- Boot Up System Speed 52
- Gate A20 Option 53
- Typematic Rate Setting 53
- Typematic Rate (Chars/Sec) 54
- Typematic Delay (Msec) 54
- Security Option 54
- Video BIOS Shadow 55
- 5-5 Chipset Features Setup 56
- Auto Configuration Function: 57
- DRAM Settings 57
- Cache Features 57
- PCI and IDE Configuration 58
- Memory Hole At 15M-16M 58
- Power Management 59
- PM Control APM 60
- Video Off Method 60
- Doze Mode 61
- Standby Mode 61
- Suspend Mode 61
- HDD Power Down 61
- 5-7 PnP/PCI Configuration 62
- 5-8 Load BIOS Defaults 63
- 5-9 Load Setup Defaults 63
- Enter Password 64
- Password Disabled 65
- 5-12 IDE HDD Auto Detection 65
- Esc: Skip 66
- QUIT Without Saving (Y/N)? Y 70
- ISA Bus Pin Assignments 72
- PCI Bus Pin Assignments 73
- Appendix A: Expansion Bus 74
- Appendix B: Technical Summary 76
- Table B-3: Timer Channels Map 77
- Table B-4: DMA Channels Map 77
- Table B-5: Memory Map 77
- Table B-6: I/O Map 78
- Appendix C: 79
- Troubleshooting 79
- Appendix C: Troubleshooting 82
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